Silicon Labs /SiM3_NRND /SIM3L168_A /ECRC_0 /CONTROL

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Interpret as CONTROL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DISABLED)SINITEN 0 (ALL_ZEROES)SEED 0 (DISABLED)CRCEN 0 (CRC32_FIXED)POLYSEL 0 (DISABLED)BMDEN 0 (DISABLED)BBREN 0 (NO_REORDER)ORDER 0 (DISABLED)ASEEDEN 0 (LSB_READ)ASEEDSEL

ORDER=NO_REORDER, POLYSEL=CRC32_FIXED, ASEEDEN=DISABLED, SEED=ALL_ZEROES, ASEEDSEL=LSB_READ, BBREN=DISABLED, BMDEN=DISABLED, CRCEN=DISABLED, SINITEN=DISABLED

Description

Module Control

Fields

SINITEN

Seed Initialization Enable.

0 (DISABLED): Do not initialize the CRC module to the value set by the SEED bit.

1 (ENABLED): Initialize the CRC module to the value set by the SEED bit.

SEED

Seed Setting.

0 (ALL_ZEROES): CRC seed value is all 0’s (0x00000000)

1 (ALL_ONES): CRC seed value is all 1’s (0xFFFFFFFF).

CRCEN

CRC Enable.

0 (DISABLED): Disable CRC operations.

1 (ENABLED): Enable CRC operations.

POLYSEL

Polynomial Selection.

0 (CRC32_FIXED): Select the fixed 32-bit polynomial: 0x04C11DB7.

1 (CRC16_PROG): Select the programmable 16-bit polynomial. The POLY register sets the polynomial coefficients.

BMDEN

Byte Mode Enable.

0 (DISABLED): Disable byte mode (word/byte width is determined automatically by the hardware).

1 (ENABLED): Enable byte mode (all writes are considered as bytes).

BBREN

Byte-Level Bit Reversal Enable.

0 (DISABLED): No byte-level bit reversal (input is same order as written).

1 (ENABLED): Byte-level bit reversal enabled (the bits in each byte are reversed).

ORDER

Input Processing Order.

0 (NO_REORDER): No byte reorientation (output is same order as input).

1 (BIG_ENDIAN_16): Swap for 16-bit big endian order (input: B3 B2 B1 B0, output: B2 B3 B0 B1).

2 (BIG_ENDIAN_32): Swap for 32-bit big endian order (input: B3 B2 B1 B0, output: B0 B1 B2 B3).

ASEEDEN

Automatic Seed Enable.

0 (DISABLED): Disable automatic seeding.

1 (ENABLED): Enable automatic seeding. Reading the byte of the DATA register selected by ASEEDSEL re-seeds the CRC result with the setting selected by SEED.

ASEEDSEL

Automatic Seed Byte Select.

0 (LSB_READ): Select a read of the least-significant byte (DATA[7:0]) for automatic re-seeding.

1 (MSB_READ): Select a read of the most-significant byte (DATA[31:24] for 32-bit operations, DATA[15:8] for 16-bit operations) for automatic re-seeding.

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